[Linuxptp-users] AM571x linuxptp support

[David Cemin]

Hi,

On the project's page I see that there is hardware timestamp support on the
cpts for the TI am335x (code can be found on linux kernel at <linux kernel
3.8+>/drivers/net/ethernet/ti/cpts.c)

The AM571x and AM572x have the same CPTS block and the PTP solution on this
family of processors is very similar.

My question to this list is: How is the support for linuxptp on these
processors? Is it fully functional ?

Thank you

regards,

David

[Richard Cochran]

Post by David Cemin
The AM571x and AM572x have the same CPTS block and the PTP solution on this
family of processors is very similar.
My question to this list is: How is the support for linuxptp on these
processors? Is it fully functional ?

If the cpts driver is enabled via the device tree, then the block
should work as well on the am57xx as it does on the am335x. I haven't
tried it though.

HTH,
Richard


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[David Cemin]

Hi Richard,

thank you for your prompt response. I assume you have tried it on TI AM335x
then. If that is the case, did you use any specific development kit ? Im
interested in understanding what kind of external hardware would be
required for this (i.e. external controlled oscillator). Also, do you know
anything about the 1pps output on these devices ?

Thank you

regards

David

Post by Richard Cochran

Post by David Cemin
The AM571x and AM572x have the same CPTS block and the PTP solution on

this

Post by David Cemin
family of processors is very similar.
My question to this list is: How is the support for linuxptp on these
processors? Is it fully functional ?

If the cpts driver is enabled via the device tree, then the block
should work as well on the am57xx as it does on the am335x. I haven't
tried it though.
HTH,
Richard

[Richard Cochran]

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[Dale Smith]

Sent from my iPhone

Post by Richard Cochran
The frequency adjustment logic on the am335x is broken. The driver
implements frequency adjustment in SW. So the HW functions are
useless.

Interesting. Do you think it's possible to rewrite the driver to use whatever HW support is available? Or is the HW so broken that they had to do it in SW?

Post by Richard Cochran
Even if the HW frequency worked, still the resolution of the
capture/compare logic is so coarse as to be

Yeah, if you can't wiggle an I/o pin precisely based of the 1588 clock, what's the point of the clock?

-Dale



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[Richard Cochran]

Post by Dale Smith
Interesting. Do you think it's possible to rewrite the driver to
use whatever HW support is available? Or is the HW so broken that
they had to do it in SW?

The HW PLLs on the am335x are not stable, and so when you dial a
non-zero frequency adjustment, the clock goes bonkers. There is no SW
work around that I am aware of.

Post by Dale Smith
Yeah, if you can't wiggle an I/o pin precisely based of the 1588
clock, what's the point of the clock?

Well, you can synchronize this PHC reasonably well via PTP, and then
use phc2sys to get the system time globally correct to within a few
microseconds, so it is not totally useless. but you are right, it is
a shame that this HW unit is so poorly designed.

Thanks,
Richard

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[FUSTE Emmanuel]

Post by Richard Cochran

Post by Dale Smith
Interesting. Do you think it's possible to rewrite the driver to
use whatever HW support is available? Or is the HW so broken that
they had to do it in SW?

The HW PLLs on the am335x are not stable, and so when you dial a
non-zero frequency adjustment, the clock goes bonkers. There is no SW
work around that I am aware of.

Post by Dale Smith
Yeah, if you can't wiggle an I/o pin precisely based of the 1588
clock, what's the point of the clock?

Well, you can synchronize this PHC reasonably well via PTP, and then
use phc2sys to get the system time globally correct to within a few
microseconds, so it is not totally useless. but you are right, it is
a shame that this HW unit is so poorly designed.

If the HW time stamping and PHC adjustments are working well, this is
not very fair.
I don't know many socs that support steering their main PLLs during
normal operations.
Even if the PLLs are not very stable, you could do very very slow
external adjustments
but you need a non negligible amount of external HW.

Regards,
Emmanuel.

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