Discussion:
[Linuxptp-users] Adding LinuxPTP to Arria 10 SoC
John Lemonovich
2017-05-16 15:44:13 UTC
Permalink
Hello,



I am trying to add ptp support into my Altera Arria 10 SoC dev kit
(Cortex-A9). Eventually I would like to use a 10G MAC with SGDMAs and SFP
port, but for now I am trying to get it working using the ARM HPS Gb-EMAC
and Micrel KSZ9031RN triple speed PHY .



I have built Linux both using Yocto and also my own build from Altera's
LTSI kernel and Buildroot/Busybox for filesystem. My question is how to
add LinuxPTP to my embedded Linux and add driver bindings to the MAC, etc.
so that I can run as an OC slave? I have downloaded the LinuxPTP source,
and set my:



ARCH=arm

CROSS_COMPILE=CROSS_COMPILE=/localcad/skyfather/ArriaX/ltsi_4_1_33/gcc-lin
aro-5.4.1-2017.01-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf-



And then I ran: make install which put the output files into
usr/local/sbin and usr/local/man/man8



Can I just copy those directories to my embedded Linux FS and run them?



BTW -

When I run ethtool -T eth0 to check capabilities I get:



Time stamping parameters for eth0:

Capabilities:

hardware-transmit (SOF_TIMESTAMPING_TX_HARDWARE)

software-transmit (SOF_TIMESTAMPING_TX_SOFTWARE)

hardware-receive (SOF_TIMESTAMPING_RX_HARDWARE)

software-receive (SOF_TIMESTAMPING_RX_SOFTWARE)

software-system-clock (SOF_TIMESTAMPING_SOFTWARE)

hardware-raw-clock (SOF_TIMESTAMPING_RAW_HARDWARE)

PTP Hardware Clock: 0

Hardware Transmit Timestamp Modes:

off (HWTSTAMP_TX_OFF)

on (HWTSTAMP_TX_ON)

Hardware Receive Filter Modes:

none (HWTSTAMP_FILTER_NONE)

all (HWTSTAMP_FILTER_ALL)

ptpv1-l4-event (HWTSTAMP_FILTER_PTP_V1_L4_EVENT)

ptpv1-l4-sync (HWTSTAMP_FILTER_PTP_V1_L4_SYNC)

ptpv1-l4-delay-req (HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ)

ptpv2-l4-event (HWTSTAMP_FILTER_PTP_V2_L4_EVENT)

ptpv2-l4-sync (HWTSTAMP_FILTER_PTP_V2_L4_SYNC)

ptpv2-l4-delay-req (HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ)

ptpv2-event (HWTSTAMP_FILTER_PTP_V2_EVENT)

ptpv2-sync (HWTSTAMP_FILTER_PTP_V2_SYNC)

ptpv2-delay-req (HWTSTAMP_FILTER_PTP_V2_DELAY_REQ)

***@arria10:/#







Thank you,



John
Richard Cochran
2017-05-16 20:00:17 UTC
Permalink
Post by John Lemonovich
And then I ran: make install which put the output files into
usr/local/sbin and usr/local/man/man8
BTW, your can do 'make install DESTDIR=/my/embedded/fs' to install the
binaries and man pages to the proper place.
Post by John Lemonovich
Can I just copy those directories to my embedded Linux FS and run them?
Yes.

Thanks,
Richard
John Lemonovich
2017-05-17 13:51:22 UTC
Permalink
Richard,

Thanks for the reply! I have the slave link up running the best master
clock routine. I am going to program another Arria 10 SoC as the master
and see if I can sync. Do you know if wireshark can filter/decode on PTP
only messages only?

John L.

-----Original Message-----
From: Richard Cochran [mailto:***@gmail.com]
Sent: Tuesday, May 16, 2017 4:00 PM
To: John Lemonovich <***@foresys.com>
Cc: linuxptp-***@lists.sourceforge.net
Subject: Re: [Linuxptp-users] Adding LinuxPTP to Arria 10 SoC
Post by John Lemonovich
And then I ran: make install which put the output files into
usr/local/sbin and usr/local/man/man8
BTW, your can do 'make install DESTDIR=/my/embedded/fs' to install the
binaries and man pages to the proper place.
Post by John Lemonovich
Can I just copy those directories to my embedded Linux FS and run them?
Yes.

Thanks,
Richard
John Lemonovich
2017-05-17 19:29:09 UTC
Permalink
Richard,

I was able to get the files compiled/installed and was able to run one A10
dev kit as the GM, and the other as a slave. When using software
timestamping, it seemed to work and achieve an offset of around 100us or
so.

Now I am trying with the -H option for PHC to achieve better timing
(hopefully). Should it work for the EMAC with the 4.1.22-ltsi-altera
kernel? I had to adjust tx_timestamp_timeout up to 100 (maybe smaller
would work, I think 10 did not work) to avoid faults.

At first the master offset numbers start around -1000 and come up to 0 and
then keep climbing forever, as if it's servo'ing but getting no feedback.
I get a clockcheck warning for every master offset print:


ptp4l[2546.894]: clockcheck: clock jumped backward or running slower than
expected!
ptp4l[2546.894]: master offset -45 s0 freq +6859 path delay
1205
ptp4l[2547.894]: clockcheck: clock jumped backward or running slower than
expected!
ptp4l[2547.926]: master offset -45 s0 freq +6859 path delay
1205
ptp4l[2548.894]: clockcheck: clock jumped backward or running slower than
expected!
ptp4l[2548.926]: master offset -5 s0 freq +6859 path delay
1205
ptp4l[2549.894]: clockcheck: clock jumped backward or running slower than
expected!
ptp4l[2549.926]: master offset 0 s0 freq +6859 path delay
1200
ptp4l[2550.894]: clockcheck: clock jumped backward or running slower than
expected!
ptp4l[2550.926]: master offset 40 s0 freq +6859 path delay
1200
ptp4l[2551.894]: clockcheck: clock jumped backward or running slower than
expected!
ptp4l[2551.926]: master offset 40 s0 freq +6859 path delay
1200
ptp4l[2552.894]: clockcheck: clock jumped backward or running slower than
expected!
ptp4l[2552.926]: master offset 80 s0 freq +6859 path delay
1200
ptp4l[2553.894]: clockcheck: clock jumped backward or running slower than
expected!
ptp4l[2553.923]: master offset 80 s0 freq +6859 path delay
1200
ptp4l[2554.894]: clockcheck: clock jumped backward or running slower than
expected!
ptp4l[2554.926]: master offset 120 s0 freq +6859 path delay
1200
ptp4l[2555.894]: clockcheck: clock jumped backward or running slower than
expected!
ptp4l[2555.898]: master offset 160 s0 freq +6859 path delay
1200
ptp4l[2556.894]: clockcheck: clock jumped backward or running slower than
expected!
ptp4l[2556.926]: master offset 160 s0 freq +6859 path delay
1200
ptp4l[2557.894]: clockcheck: clock jumped backward or running slower than
expected!
ptp4l[2557.926]: master offset 200 s0 freq +6859 path delay
1200
ptp4l[2558.894]: clockcheck: clock jumped backward or running slower than
expected!
ptp4l[2558.926]: master offset 220 s0 freq +6859 path delay
1200


Thank you,

John


-----Original Message-----
From: Richard Cochran [mailto:***@gmail.com]
Sent: Tuesday, May 16, 2017 4:00 PM
To: John Lemonovich <***@foresys.com>
Cc: linuxptp-***@lists.sourceforge.net
Subject: Re: [Linuxptp-users] Adding LinuxPTP to Arria 10 SoC
Post by John Lemonovich
And then I ran: make install which put the output files into
usr/local/sbin and usr/local/man/man8
BTW, your can do 'make install DESTDIR=/my/embedded/fs' to install the
binaries and man pages to the proper place.
Post by John Lemonovich
Can I just copy those directories to my embedded Linux FS and run them?
Yes.

Thanks,
Richard
Richard Cochran
2017-05-18 12:26:32 UTC
Permalink
Post by John Lemonovich
Now I am trying with the -H option for PHC to achieve better timing
(hopefully). Should it work for the EMAC with the 4.1.22-ltsi-altera
kernel?
IIRC, last time I looked, the altera HW and drivers are hopelessly
broken. Ditto for the similar xilinx parts.

Neither have drivers in mainline Linux, IIRC.

Thanks,
Richard
John Lemonovich
2017-05-18 13:02:22 UTC
Permalink
Richard,

That's what I was afraid of. It seemed as though SW timestamping was
working, but then I had a problem with my rootfs in my Linux build, and I
didn't go back to try it again.

The Altera TSE MAC is listed as supported (whereas the ARM EMAC is not,
specifically), would you suspect I would have more luck with that? It's
only listed as supporting software timestamping - not PHC.

Thank you,

John

-----Original Message-----
From: Richard Cochran [mailto:***@gmail.com]
Sent: Thursday, May 18, 2017 8:27 AM
To: John Lemonovich <***@foresys.com>
Cc: linuxptp-***@lists.sourceforge.net
Subject: Re: [Linuxptp-users] Adding LinuxPTP to Arria 10 SoC
Post by John Lemonovich
Now I am trying with the -H option for PHC to achieve better timing
(hopefully). Should it work for the EMAC with the 4.1.22-ltsi-altera
kernel?
IIRC, last time I looked, the altera HW and drivers are hopelessly broken.
Ditto for the similar xilinx parts.

Neither have drivers in mainline Linux, IIRC.

Thanks,
Richard
Hunter Olson
2017-05-18 15:29:39 UTC
Permalink
John,

I'm going through the same troubles right now on Altera's Cyclone V SOC
platform.

I've found that if no PTP clock is specified for the emac entry in your
device tree, the stmmac driver defaults to expect the emac clock (250Mhz),
but it seems Altera is feeding in the eosc1 clock (25mhz). If you run the
testptp application, you'll see the ptp clock is running at 1/10th speed.
This is causing ptp4l to throw those 'clockcheck' warnings that you're
seeing.

See
*https://github.com/torvalds/linux/commit/bf171f01afe31f0c593deb55b96c3cb9e20cd6dd*

<https://github.com/torvalds/linux/commit/bf171f01afe31f0c593deb55b96c3cb9e20cd6dd>for
how to add the ptp clock to your device tree, allowing the driver to grab
the correct ptp clock rate.

I also backported to Altera's 4.1.22 some ptp related commits that show up
in mainline kernel 4.5, such as:
*https://github.com/torvalds/linux/commit/19d857c9038e5c07db8f8cc02b5ad0cd0098714f
<https://github.com/torvalds/linux/commit/19d857c9038e5c07db8f8cc02b5ad0cd0098714f>*

Like you noticed, I had to bump ptp4l's tx_timestamp_timeout up to 100.

Still testing, but it appears LinuxPTP H/W timestamping works after these
changes.

Regards,
Hunter



On Thu, May 18, 2017 at 9:02 AM, John Lemonovich <
Post by John Lemonovich
Richard,
That's what I was afraid of. It seemed as though SW timestamping was
working, but then I had a problem with my rootfs in my Linux build, and I
didn't go back to try it again.
The Altera TSE MAC is listed as supported (whereas the ARM EMAC is not,
specifically), would you suspect I would have more luck with that? It's
only listed as supporting software timestamping - not PHC.
Thank you,
John
-----Original Message-----
Sent: Thursday, May 18, 2017 8:27 AM
Subject: Re: [Linuxptp-users] Adding LinuxPTP to Arria 10 SoC
Post by John Lemonovich
Now I am trying with the -H option for PHC to achieve better timing
(hopefully). Should it work for the EMAC with the 4.1.22-ltsi-altera
kernel?
IIRC, last time I looked, the altera HW and drivers are hopelessly broken.
Ditto for the similar xilinx parts.
Neither have drivers in mainline Linux, IIRC.
Thanks,
Richard
------------------------------------------------------------
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Phil Reid
2017-05-22 05:17:10 UTC
Permalink
John,
I'm going through the same troubles right now on Altera's Cyclone V SOC platform.
I've found that if no PTP clock is specified for the emac entry in your device tree, the stmmac driver defaults to expect the emac clock (250Mhz), but it seems
Altera is feeding in the eosc1 clock (25mhz). If you run the testptp application, you'll see the ptp clock is running at 1/10th speed. This is causing ptp4l
to throw those 'clockcheck' warnings that you're seeing.
See _https://github.com/torvalds/linux/commit/bf171f01afe31f0c593deb55b96c3cb9e20cd6dd_
<https://github.com/torvalds/linux/commit/bf171f01afe31f0c593deb55b96c3cb9e20cd6dd>for how to add the ptp clock to your device tree, allowing the driver to grab
the correct ptp clock rate.
_https://github.com/torvalds/linux/commit/19d857c9038e5c07db8f8cc02b5ad0cd0098714f
<https://github.com/torvalds/linux/commit/19d857c9038e5c07db8f8cc02b5ad0cd0098714f>_
Like you noticed, I had to bump ptp4l's tx_timestamp_timeout up to 100.
Still testing, but it appears LinuxPTP H/W timestamping works after these changes.
From memory there where also issues with the ptp clk config and resets with those older kernels.
Some related patches to things I had tofix to get it going..


https://github.com/torvalds/linux/commit/734e00fa02eff5003827abc06a7ebf9449349109
https://github.com/torvalds/linux/commit/e6dbe1eb2db0d7a14991c06278dd3030c45fb825
https://github.com/torvalds/linux/commit/43569814fa35b2ae68f09780c4ee3d4a182711e9
https://github.com/torvalds/linux/commit/27015f8c17578e14b3c6cc098b915b0f8db3ac36
--
Regards
Phil Reid
Baya Oussena
2017-05-22 07:16:20 UTC
Permalink
Hallo Reid,

I am about to use PTP on my Altera Cyclone V. I want to use the altera 1588
solution IP core. Iam using quaturs to set my system .. Please could you
let me know what variable I should enable in the configuration, also which
PTP open software do you use. Will it work by using the PTP Linux one? or
is there a version for NIOS Altera.

I thank you in advance for your help,
Baya
Post by Hunter Olson
Post by Hunter Olson
John,
I'm going through the same troubles right now on Altera's Cyclone V SOC
platform.
Post by Hunter Olson
I've found that if no PTP clock is specified for the emac entry in your
device tree, the stmmac driver defaults to expect the emac clock (250Mhz),
but it seems
Post by Hunter Olson
Altera is feeding in the eosc1 clock (25mhz). If you run the testptp
application, you'll see the ptp clock is running at 1/10th speed. This is
causing ptp4l
Post by Hunter Olson
to throw those 'clockcheck' warnings that you're seeing.
See _https://github.com/torvalds/linux/commit/
bf171f01afe31f0c593deb55b96c3cb9e20cd6dd_
Post by Hunter Olson
<https://github.com/torvalds/linux/commit/bf171f01afe31f0c593deb55b96c3c
b9e20cd6dd>for how to add the ptp clock to your device tree, allowing the
driver to grab
Post by Hunter Olson
the correct ptp clock rate.
I also backported to Altera's 4.1.22 some ptp related commits that show
_https://github.com/torvalds/linux/commit/19d857c9038e5c07db8f8cc02b5ad0
cd0098714f
Post by Hunter Olson
<https://github.com/torvalds/linux/commit/19d857c9038e5c07db8f8cc02b5ad0
cd0098714f>_
Post by Hunter Olson
Like you noticed, I had to bump ptp4l's tx_timestamp_timeout up to 100.
Still testing, but it appears LinuxPTP H/W timestamping works after
these changes.
From memory there where also issues with the ptp clk config and resets
with those older kernels.
Some related patches to things I had tofix to get it going..
https://github.com/torvalds/linux/commit/734e00fa02eff5003827abc06a7ebf
9449349109
https://github.com/torvalds/linux/commit/e6dbe1eb2db0d7a14991c06278dd30
30c45fb825
https://github.com/torvalds/linux/commit/43569814fa35b2ae68f09780c4ee3d
4a182711e9
https://github.com/torvalds/linux/commit/27015f8c17578e14b3c6cc098b915b
0f8db3ac36
--
Regards
Phil Reid
------------------------------------------------------------
------------------
Check out the vibrant tech community on one of the world's most
engaging tech sites, Slashdot.org! http://sdm.link/slashdot
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Phil Reid
2017-05-23 04:53:46 UTC
Permalink
G'day Baya,
Post by Baya Oussena
Hallo Reid,
I am about to use PTP on my Altera Cyclone V. I want to use the altera 1588 solution IP core. Iam using quaturs to set my system .. Please could you let me know
what variable I should enable in the configuration, also which PTP open software do you use. Will it work by using the PTP Linux one? or is there a version for
NIOS Altera.
I uses the HPS EMAC, with linuxptp 1.6
The newer quartus versions allow exporting of the ptp fpga interface even when using the dedicated hps pins if that helps.
Not sure of anything for the NIOS or Altera softcore EMAC.
Post by Baya Oussena
I thank you in advance for your help,
Baya
John,
I'm going through the same troubles right now on Altera's Cyclone V SOC platform.
I've found that if no PTP clock is specified for the emac entry in your device tree, the stmmac driver defaults to expect the emac clock (250Mhz), but it
seems
Altera is feeding in the eosc1 clock (25mhz). If you run the testptp application, you'll see the ptp clock is running at 1/10th speed. This is causing
ptp4l
to throw those 'clockcheck' warnings that you're seeing.
See _https://github.com/torvalds/linux/commit/bf171f01afe31f0c593deb55b96c3cb9e20cd6dd_
<https://github.com/torvalds/linux/commit/bf171f01afe31f0c593deb55b96c3cb9e20cd6dd_>
<https://github.com/torvalds/linux/commit/bf171f01afe31f0c593deb55b96c3cb9e20cd6dd
<https://github.com/torvalds/linux/commit/bf171f01afe31f0c593deb55b96c3cb9e20cd6dd>>for how to add the ptp clock to your device tree, allowing the driver to
grab
the correct ptp clock rate.
_https://github.com/torvalds/linux/commit/19d857c9038e5c07db8f8cc02b5ad0cd0098714f
<https://github.com/torvalds/linux/commit/19d857c9038e5c07db8f8cc02b5ad0cd0098714f>
<https://github.com/torvalds/linux/commit/19d857c9038e5c07db8f8cc02b5ad0cd0098714f
<https://github.com/torvalds/linux/commit/19d857c9038e5c07db8f8cc02b5ad0cd0098714f>>_
Like you noticed, I had to bump ptp4l's tx_timestamp_timeout up to 100.
Still testing, but it appears LinuxPTP H/W timestamping works after these changes.
From memory there where also issues with the ptp clk config and resets with those older kernels.
Some related patches to things I had tofix to get it going..
https://github.com/torvalds/linux/commit/734e00fa02eff5003827abc06a7ebf9449349109
<https://github.com/torvalds/linux/commit/734e00fa02eff5003827abc06a7ebf9449349109>
https://github.com/torvalds/linux/commit/e6dbe1eb2db0d7a14991c06278dd3030c45fb825
<https://github.com/torvalds/linux/commit/e6dbe1eb2db0d7a14991c06278dd3030c45fb825>
https://github.com/torvalds/linux/commit/43569814fa35b2ae68f09780c4ee3d4a182711e9
<https://github.com/torvalds/linux/commit/43569814fa35b2ae68f09780c4ee3d4a182711e9>
https://github.com/torvalds/linux/commit/27015f8c17578e14b3c6cc098b915b0f8db3ac36
<https://github.com/torvalds/linux/commit/27015f8c17578e14b3c6cc098b915b0f8db3ac36>
--
Regards
Phil Reid
------------------------------------------------------------------------------
Check out the vibrant tech community on one of the world's most
engaging tech sites, Slashdot.org! http://sdm.link/slashdot
_______________________________________________
Linuxptp-users mailing list
https://lists.sourceforge.net/lists/listinfo/linuxptp-users <https://lists.sourceforge.net/lists/listinfo/linuxptp-users>
--
Regards
Phil Reid

ElectroMagnetic Imaging Technology Pty Ltd
Development of Geophysical Instrumentation & Software
www.electromag.com.au

3 The Avenue, Midland WA 6056, AUSTRALIA
Ph: +61 8 9250 8100
Fax: +61 8 9250 7100
Email: ***@electromag.com.au
John Lemonovich
2017-05-23 14:28:24 UTC
Permalink
Hi Phil,

What kernel version are you running to successfully use HPS EMAC with HW
timestamping? Instead of trying to backport the ptp changes (your commit
from Dec 2015) to the stmmac driver, I compiled and tried to run kernel
v4.5 which already has those changes (among others). But now I'm back to
getting the clock jumped forward or running faster than expected messages,
and the master offset just increases indefinitely.

I had changed these 2 lines of my altera-generated DTS per
recommendation from another user who was using 4.1.22-altera-ltsi:

clocks = <&l4_mp_clk &arria10_hps_0_eosc1>;
clock-names = "stmmaceth", "clk_ptp_ref"

I added both the latter parameters from above. I was surprised to see the
driver chosen upon boot was as follows (previously with
4.1.22-altera-ltsi):
driver -> ../../../../bus/platform/drivers/socfpga-dwmac
of_node -> ../../../../firmware/devicetree/base/***@0/***@0xff800000


So then I just get:

ptp4l[776.919]: clockcheck: clock jumped forward or running faster than
expected!
ptp4l[776.958]: master offset -2640 s0 freq +7080 path delay
-1160
ptp4l[776.958]: port 1: SLAVE to UNCALIBRATED on SYNCHRONIZATION_FAULT
ptp4l[777.919]: clockcheck: clock jumped forward or running faster than
expected!
ptp4l[777.958]: master offset -12520 s0 freq +7080 path delay
5040
ptp4l[778.919]: clockcheck: clock jumped forward or running faster than
expected!
ptp4l[778.958]: master offset -22400 s0 freq +7080 path delay
11240
ptp4l[779.919]: clockcheck: clock jumped forward or running faster than
expected!
ptp4l[779.958]: master offset -26000 s0 freq +7080 path delay
11240
ptp4l[780.919]: clockcheck: clock jumped forward or running faster than
expected!
ptp4l[780.958]: master offset -29180 s0 freq +7080 path delay
10580
ptp4l[781.919]: clockcheck: clock jumped forward or running faster than
expected!

Thank you,

John L.

-----Original Message-----
From: Phil Reid [mailto:***@electromag.com.au]
Sent: Tuesday, May 23, 2017 12:54 AM
To: Baya Oussena <***@gmail.com>
Cc: linuxptp-***@lists.sourceforge.net
Subject: Re: [Linuxptp-users] Adding LinuxPTP to Arria 10 SoC

G'day Baya,
Post by Baya Oussena
Hallo Reid,
I am about to use PTP on my Altera Cyclone V. I want to use the altera
1588 solution IP core. Iam using quaturs to set my system .. Please
could you let me know what variable I should enable in the
configuration, also which PTP open software do you use. Will it work by
using the PTP Linux one? or is there a version for NIOS Altera.


I uses the HPS EMAC, with linuxptp 1.6
The newer quartus versions allow exporting of the ptp fpga interface even
when using the dedicated hps pins if that helps.
Not sure of anything for the NIOS or Altera softcore EMAC.
Post by Baya Oussena
I thank you in advance for your help,
Baya
John,
I'm going through the same troubles right now on Altera's Cyclone V SOC platform.
I've found that if no PTP clock is specified for the emac entry
in your device tree, the stmmac driver defaults to expect the emac clock
(250Mhz), but it
Post by Baya Oussena
seems
Altera is feeding in the eosc1 clock (25mhz). If you run the
testptp application, you'll see the ptp clock is running at 1/10th speed.
This is causing
Post by Baya Oussena
ptp4l
to throw those 'clockcheck' warnings that you're seeing.
See
_https://github.com/torvalds/linux/commit/bf171f01afe31f0c593deb55b96c3cb9
e20cd6dd_
<https://github.com/torvalds/linux/commit/bf171f01afe31f0c593deb55b96c3cb9
e20cd6dd_>
<https://github.com/torvalds/linux/commit/bf171f01afe31f0c593deb55b96c3cb9
e20cd6dd
<https://github.com/torvalds/linux/commit/bf171f01afe31f0c593deb55b96c3cb9
e20cd6dd>>for how to add the ptp clock to your device tree, allowing the
driver to
Post by Baya Oussena
grab
the correct ptp clock rate.
I also backported to Altera's 4.1.22 some ptp related commits
that show up in mainline kernel 4.5, such as:
_https://github.com/torvalds/linux/commit/19d857c9038e5c07db8f8cc02b5ad0cd
0098714f
<https://github.com/torvalds/linux/commit/19d857c9038e5c07db8f8cc02b5ad0cd
0098714f>
<https://github.com/torvalds/linux/commit/19d857c9038e5c07db8f8cc02b5ad0cd
0098714f
<https://github.com/torvalds/linux/commit/19d857c9038e5c07db8f8cc02b5ad0cd
0098714f>>_
Post by Baya Oussena
Like you noticed, I had to bump ptp4l's tx_timestamp_timeout up to 100.
Still testing, but it appears LinuxPTP H/W timestamping works after these changes.
From memory there where also issues with the ptp clk config and
resets with those older kernels.
Post by Baya Oussena
Some related patches to things I had tofix to get it going..
https://github.com/torvalds/linux/commit/734e00fa02eff5003827abc06a7ebf944
9349109
<https://github.com/torvalds/linux/commit/734e00fa02eff5003827abc06a7ebf94
49349109>
https://github.com/torvalds/linux/commit/e6dbe1eb2db0d7a14991c06278dd3030c
45fb825
<https://github.com/torvalds/linux/commit/e6dbe1eb2db0d7a14991c06278dd3030
c45fb825>
https://github.com/torvalds/linux/commit/43569814fa35b2ae68f09780c4ee3d4a1
82711e9
<https://github.com/torvalds/linux/commit/43569814fa35b2ae68f09780c4ee3d4a
182711e9>
https://github.com/torvalds/linux/commit/27015f8c17578e14b3c6cc098b915b0f8
db3ac36
Post by Baya Oussena
<https://github.com/torvalds/linux/commit/27015f8c17578e14b3c6cc098b91
5b0f8db3ac36>
--
Regards
Phil Reid
--------------------------------------------------------------------------
----
Post by Baya Oussena
Check out the vibrant tech community on one of the world's most
engaging tech sites, Slashdot.org! http://sdm.link/slashdot
_______________________________________________
Linuxptp-users mailing list
https://lists.sourceforge.net/lists/listinfo/linuxptp-users
<https://lists.sourceforge.net/lists/listinfo/linuxptp-users>
--
Regards
Phil Reid

ElectroMagnetic Imaging Technology Pty Ltd Development of Geophysical
Instrumentation & Software www.electromag.com.au

3 The Avenue, Midland WA 6056, AUSTRALIA
Ph: +61 8 9250 8100
Fax: +61 8 9250 7100
Email: ***@electromag.com.au

--------------------------------------------------------------------------
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tech sites, Slashdot.org! http://sdm.link/slashdot
_______________________________________________
Linuxptp-users mailing list
Linuxptp-***@lists.sourceforge.net
https://lists.sourceforge.net/lists/listinfo/linuxptp-users
Phil Reid
2017-05-24 05:30:49 UTC
Permalink
G'day John,
Post by John Lemonovich
Hi Phil,
What kernel version are you running to successfully use HPS EMAC with HW
timestamping? Instead of trying to backport the ptp changes (your commit
from Dec 2015) to the stmmac driver, I compiled and tried to run kernel
v4.5 which already has those changes (among others). But now I'm back to
getting the clock jumped forward or running faster than expected messages,
and the master offset just increases indefinitely.
I don't have a system here at the moment running it. But it was work with a variant of 4.7.
Post by John Lemonovich
I had changed these 2 lines of my altera-generated DTS per
clocks = <&l4_mp_clk &arria10_hps_0_eosc1>;
clock-names = "stmmaceth", "clk_ptp_ref"
I'm not familiar with the Arria and thee a couple of difference to the C-V.
But a quick look at the handbook for the arria 10 shows the emac_ptp_clk
is an output of one of the pll's.

so arria10_hps_0_eosc1 doesn't sound quite right.
There looks to be a few registers to config this clock output so it could be okay, but maybe not.

This is different to the c-v which could only had the osc1_clk option.
Post by John Lemonovich
I added both the latter parameters from above. I was surprised to see the
driver chosen upon boot was as follows (previously with
driver -> ../../../../bus/platform/drivers/socfpga-dwmac
ptp4l[776.919]: clockcheck: clock jumped forward or running faster than
expected!
ptp4l[776.958]: master offset -2640 s0 freq +7080 path delay
-1160
ptp4l[776.958]: port 1: SLAVE to UNCALIBRATED on SYNCHRONIZATION_FAULT
ptp4l[777.919]: clockcheck: clock jumped forward or running faster than
expected!
ptp4l[777.958]: master offset -12520 s0 freq +7080 path delay
5040
ptp4l[778.919]: clockcheck: clock jumped forward or running faster than
expected!
ptp4l[778.958]: master offset -22400 s0 freq +7080 path delay
11240
ptp4l[779.919]: clockcheck: clock jumped forward or running faster than
expected!
ptp4l[779.958]: master offset -26000 s0 freq +7080 path delay
11240
ptp4l[780.919]: clockcheck: clock jumped forward or running faster than
expected!
ptp4l[780.958]: master offset -29180 s0 freq +7080 path delay
10580
ptp4l[781.919]: clockcheck: clock jumped forward or running faster than
expected!
The following snippet was helpful for me.
Got reject for mainline.
Make sure the increment and addend register are getting set correctly.
goes in stmmac_main search for stmmac_init_fs

static int stmmac_sysfs_ptp_read(struct seq_file *seq, void *v)
{
struct net_device *dev = seq->private;
struct stmmac_priv *priv = netdev_priv(dev);

if (!(priv->dma_cap.time_stamp || priv->adv_ts)) {
seq_printf(seq, "PTP HW features not supported\n");
return 0;
}

seq_printf(seq, "==============================\n");
seq_printf(seq, "\tPTP Status\n");
seq_printf(seq, "==============================\n");

#define DUMP_REG(x) seq_printf(seq, "%-20s %04x %08x\n", #x, x, readl(priv->ptpaddr + x));
DUMP_REG(GMAC_INT_STATUS);
DUMP_REG(GMAC_INT_MASK);

DUMP_REG(PTP_TCR);
DUMP_REG(PTP_SSIR);
DUMP_REG(PTP_STSR);
DUMP_REG(PTP_STNSR);
DUMP_REG(PTP_STSUR);
DUMP_REG(PTP_STNSUR);
DUMP_REG(PTP_TAR);
DUMP_REG(PTP_TTSR);
DUMP_REG(PTP_TTNSR);
DUMP_REG(PTP_STHWSR);
DUMP_REG(PTP_TSR);
DUMP_REG(PTP_PPSCTLR);
DUMP_REG(PTP_AUXTSTNSR);
DUMP_REG(PTP_AUXTSTSR);
DUMP_REG(PTP_PPS0INTRR);
DUMP_REG(PTP_PPS0WDTHR);

return 0;
}

static int stmmac_sysfs_ptp_open(struct inode *inode, struct file *file)
{
return single_open(file, stmmac_sysfs_ptp_read, inode->i_private);
}

static const struct file_operations stmmac_ptp_fops = {
.owner = THIS_MODULE,
.open = stmmac_sysfs_ptp_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};

static int stmmac_init_fs(struct net_device *dev)
{
struct stmmac_priv *priv = netdev_priv(dev);

<snip....>

/* Entry to report the PTP status */
priv->dbgfs_ptp = debugfs_create_file("ptp", S_IRUGO,
priv->dbgfs_dir,
dev, &stmmac_ptp_fops);

if (!priv->dbgfs_ptp || IS_ERR(priv->dbgfs_ptp)) {
pr_info("ERROR creating stmmac PTP debugfs file\n");
debugfs_remove_recursive(priv->dbgfs_dir);

return -ENOMEM;
}

return 0;
}
--
Regards
Phil Reid

ElectroMagnetic Imaging Technology Pty Ltd
Development of Geophysical Instrumentation & Software
www.electromag.com.au

3 The Avenue, Midland WA 6056, AUSTRALIA
Ph: +61 8 9250 8100
Fax: +61 8 9250 7100
Email: ***@electromag.com.au
John Lemonovich
2017-05-26 20:51:08 UTC
Permalink
Hello,



I am happy to report that I was able to get HW timestamping working and two
of my A10 SoC kits (one as GM , one as slave) are synchronized, and the pps
output / offset reports are maintaining @ <30-40ns! It’s really neat to
watch them converge on the scope! Thanks very much to Ian and Hunter, who
both helped me to figure things out. I do have some problem where they
suddenly lose sync after about 5 minutes or so. The offsets suddenly jump
way up and it never gets back in sync. I will be debugging this next.



**************************************************************************

Just as information, in case it helps someone else who is trying to get ptp
HW timestamping working in an Altera SoC using the HPS EMAC, I thought I
would list what I had to do:



First off I am using the Altera-opensource 4.1.33-ltsi kernel on Arria 10
SoC kits, so results may be different with different kits/kernels/device
trees.



There are a few ptp-related kernel options in the .config file that must be
set to =y (yes). Just search for PTP or 1588 and enable everything, or use
the menu tool for the same.

The Cyclone V SoC and Arria10 SoC have implemented the STM Synopsys MAC IP
Core (stmmac) for the HPS MAC. Upon boot it should report: stmmac - user
ID: 0x10, Synopsys ID: 0x37

Once you verify this - the driver files are located in
/drivers/net/ethernet/stmicro/stmmac

I then manually applied the changes to a few of these driver files per
https://github.com/torvalds/linux/commit/19d857c9038e5c07db8f8cc02b5ad0cd0098714f



The device tree source must be changed to add the ptp engine clock, and this
must (obviously) be the correct clock for your implementation.

This was tricky for the A10 as there are dozens of clocks and I kept getting
it wrong until I figured it all out.

For the A10 Qsys has an option for using the Main PLL Clock or Peripheral
PLL clock. For my system I am using the C4 output (Feature EMAC PTP)
Peripheral PLL clock @ 100MHz.



In order to direct the driver to this clock there are 2 lines that must be
changed in the device tree source (you can see the old and new here):

//clocks = <&l4_mp_clk>; /* appended from boardinfo */

clocks = <&l4_mp_clk &peri_emac_ptp_clk>; /* appended from boardinfo */

//clock-names = "stmmaceth"; /*
embeddedsw.dts.params.clock-names type STRING */

clock-names = "stmmaceth","clk_ptp_ref"; /*
embeddedsw.dts.params.clock-names type STRING */





And then I downloaded and compiled the linuxPTP source, and installed the
output programs/files into my rootfs.

When running the ptp4l program (see man pages or search online for help) I
had to increase the following parameter, based on errors I was getting (this
was actually a suggestion from the program itself via the console).

[global]

tx_timestamp_timeout 100

So I made a ptp4l.conf file with these lines, and then directed ptp4l to use
this file as a config file.



There is a very helpful command for debugging the ptp engine clocking and it
is:

phc_ctl /dev/ptp0 freq 10000 set 0.0 wait 10.0 get



This will delay for 10 seconds from epoch and report how much time has
elapsed from epoch, based on the ptp clock. The output should be as
follows, if it’s reporting more or less then 10 seconds have elapsed, there
is a clock problem!



phc_ctl[9886.541]: adjusted clock frequency offset to 10000.000000ppb

phc_ctl[9886.541]: set clock time to 0.000000000 or Thu Jan 1 00:00:00 1970

phc_ctl[9896.541]: process slept for 10.000000 seconds



phc_ctl[9896.542]: clock time is 10.000404880 or Thu Jan 1 00:00:10 1970





Thank you,



John L.





From: Hunter Olson [mailto:***@alcorn.com]
Sent: Thursday, May 18, 2017 11:30 AM
To: John Lemonovich <***@foresys.com>
Cc: linuxptp-***@lists.sourceforge.net
Subject: Re: [Linuxptp-users] Adding LinuxPTP to Arria 10 SoC



John,



I'm going through the same troubles right now on Altera's Cyclone V SOC
platform.



I've found that if no PTP clock is specified for the emac entry in your
device tree, the stmmac driver defaults to expect the emac clock (250Mhz),
but it seems Altera is feeding in the eosc1 clock (25mhz). If you run the
testptp application, you'll see the ptp clock is running at 1/10th speed.
This is causing ptp4l to throw those 'clockcheck' warnings that you're
seeing.



See
<https://github.com/torvalds/linux/commit/bf171f01afe31f0c593deb55b96c3cb9e20cd6dd>
https://github.com/torvalds/linux/commit/bf171f01afe31f0c593deb55b96c3cb9e20cd6dd
for how to add the ptp clock to your device tree, allowing the driver to
grab the correct ptp clock rate.



I also backported to Altera's 4.1.22 some ptp related commits that show up
in mainline kernel 4.5, such as:

https://github.com/torvalds/linux/commit/19d857c9038e5c07db8f8cc02b5ad0cd0098714f



Like you noticed, I had to bump ptp4l's tx_timestamp_timeout up to 100.



Still testing, but it appears LinuxPTP H/W timestamping works after these
changes.



Regards,

Hunter







On Thu, May 18, 2017 at 9:02 AM, John Lemonovich
<***@foresys.com <mailto:***@foresys.com> > wrote:

Richard,

That's what I was afraid of. It seemed as though SW timestamping was
working, but then I had a problem with my rootfs in my Linux build, and I
didn't go back to try it again.

The Altera TSE MAC is listed as supported (whereas the ARM EMAC is not,
specifically), would you suspect I would have more luck with that? It's
only listed as supporting software timestamping - not PHC.

Thank you,

John

-----Original Message-----
From: Richard Cochran [mailto:***@gmail.com
<mailto:***@gmail.com> ]
Sent: Thursday, May 18, 2017 8:27 AM
To: John Lemonovich <***@foresys.com
<mailto:***@foresys.com> >
Cc: linuxptp-***@lists.sourceforge.net
<mailto:linuxptp-***@lists.sourceforge.net>
Subject: Re: [Linuxptp-users] Adding LinuxPTP to Arria 10 SoC
Post by John Lemonovich
Now I am trying with the -H option for PHC to achieve better timing
(hopefully). Should it work for the EMAC with the 4.1.22-ltsi-altera
kernel?
IIRC, last time I looked, the altera HW and drivers are hopelessly broken.
Ditto for the similar xilinx parts.

Neither have drivers in mainline Linux, IIRC.

Thanks,
Richard
Ian Thompson
2017-05-17 13:39:17 UTC
Permalink
John

We are running ptp4l on a Cyclone V SoC through the stmicro mac. Are you using that or the Altera triple-speed mac? The stmmac driver has a few quirks with Kernel 3.18 but things improve with later kernels >4.8.
The driver doesn't use the correct system call for setting initial timings and ptp4l will do a re-initialize on certain fault conditions. We see missing delay request responses under heavy traffic loads and then will get a "glitch" in ptp times.
Unfortunately, we can't move to the later kernels, as we don't believe the PCIe root port is configured correctly with 4.x kernels, which we need to work.

Good Luck
Ian T.


From: John Lemonovich [mailto:***@foresys.com]
Sent: Tuesday, May 16, 2017 10:44 AM
To: linuxptp-***@lists.sourceforge.net
Subject: [External] [Linuxptp-users] Adding LinuxPTP to Arria 10 SoC

Hello,

I am trying to add ptp support into my Altera Arria 10 SoC dev kit (Cortex-A9). Eventually I would like to use a 10G MAC with SGDMAs and SFP port, but for now I am trying to get it working using the ARM HPS Gb-EMAC and Micrel KSZ9031RN triple speed PHY .

I have built Linux both using Yocto and also my own build from Altera's LTSI kernel and Buildroot/Busybox for filesystem. My question is how to add LinuxPTP to my embedded Linux and add driver bindings to the MAC, etc. so that I can run as an OC slave? I have downloaded the LinuxPTP source, and set my:

ARCH=arm
CROSS_COMPILE=CROSS_COMPILE=/localcad/skyfather/ArriaX/ltsi_4_1_33/gcc-linaro-5.4.1-2017.01-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf-

And then I ran: make install which put the output files into usr/local/sbin and usr/local/man/man8

Can I just copy those directories to my embedded Linux FS and run them?

BTW -
When I run ethtool -T eth0 to check capabilities I get:

Time stamping parameters for eth0:
Capabilities:
hardware-transmit (SOF_TIMESTAMPING_TX_HARDWARE)
software-transmit (SOF_TIMESTAMPING_TX_SOFTWARE)
hardware-receive (SOF_TIMESTAMPING_RX_HARDWARE)
software-receive (SOF_TIMESTAMPING_RX_SOFTWARE)
software-system-clock (SOF_TIMESTAMPING_SOFTWARE)
hardware-raw-clock (SOF_TIMESTAMPING_RAW_HARDWARE)
PTP Hardware Clock: 0
Hardware Transmit Timestamp Modes:
off (HWTSTAMP_TX_OFF)
on (HWTSTAMP_TX_ON)
Hardware Receive Filter Modes:
none (HWTSTAMP_FILTER_NONE)
all (HWTSTAMP_FILTER_ALL)
ptpv1-l4-event (HWTSTAMP_FILTER_PTP_V1_L4_EVENT)
ptpv1-l4-sync (HWTSTAMP_FILTER_PTP_V1_L4_SYNC)
ptpv1-l4-delay-req (HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ)
ptpv2-l4-event (HWTSTAMP_FILTER_PTP_V2_L4_EVENT)
ptpv2-l4-sync (HWTSTAMP_FILTER_PTP_V2_L4_SYNC)
ptpv2-l4-delay-req (HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ)
ptpv2-event (HWTSTAMP_FILTER_PTP_V2_EVENT)
ptpv2-sync (HWTSTAMP_FILTER_PTP_V2_SYNC)
ptpv2-delay-req (HWTSTAMP_FILTER_PTP_V2_DELAY_REQ)
***@arria10:/#



Thank you,

John
John Lemonovich
2017-05-17 13:57:47 UTC
Permalink
Ian,



Thanks for the response. I am using the HPS EMAC, not the TSE
MAC.although there is no reason I can't use the TSE MAC really. My kernel
version is the 4.1.22-ltsi-altera (Angstrom v2015.12 built with Yocto).



What accuracy have you been able to achieve using the TSE MAC? Are you
using SW timestamping only?



John L.



From: Ian Thompson [mailto:***@pgs.com]
Sent: Wednesday, May 17, 2017 9:39 AM
To: John Lemonovich <***@foresys.com>;
linuxptp-***@lists.sourceforge.net
Subject: RE: Adding LinuxPTP to Arria 10 SoC



John



We are running ptp4l on a Cyclone V SoC through the stmicro mac. Are you
using that or the Altera triple-speed mac? The stmmac driver has a few
quirks with Kernel 3.18 but things improve with later kernels >4.8.

The driver doesn't use the correct system call for setting initial timings
and ptp4l will do a re-initialize on certain fault conditions. We see
missing delay request responses under heavy traffic loads and then will
get a "glitch" in ptp times.

Unfortunately, we can't move to the later kernels, as we don't believe
the PCIe root port is configured correctly with 4.x kernels, which we need
to work.



Good Luck

Ian T.





From: John Lemonovich [mailto:***@foresys.com]
Sent: Tuesday, May 16, 2017 10:44 AM
To: linuxptp-***@lists.sourceforge.net
<mailto:linuxptp-***@lists.sourceforge.net>
Subject: [External] [Linuxptp-users] Adding LinuxPTP to Arria 10 SoC



Hello,



I am trying to add ptp support into my Altera Arria 10 SoC dev kit
(Cortex-A9). Eventually I would like to use a 10G MAC with SGDMAs and SFP
port, but for now I am trying to get it working using the ARM HPS Gb-EMAC
and Micrel KSZ9031RN triple speed PHY .



I have built Linux both using Yocto and also my own build from Altera's
LTSI kernel and Buildroot/Busybox for filesystem. My question is how to
add LinuxPTP to my embedded Linux and add driver bindings to the MAC, etc.
so that I can run as an OC slave? I have downloaded the LinuxPTP source,
and set my:



ARCH=arm

CROSS_COMPILE=CROSS_COMPILE=/localcad/skyfather/ArriaX/ltsi_4_1_33/gcc-lin
aro-5.4.1-2017.01-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf-



And then I ran: make install which put the output files into
usr/local/sbin and usr/local/man/man8



Can I just copy those directories to my embedded Linux FS and run them?



BTW -

When I run ethtool -T eth0 to check capabilities I get:



Time stamping parameters for eth0:

Capabilities:

hardware-transmit (SOF_TIMESTAMPING_TX_HARDWARE)

software-transmit (SOF_TIMESTAMPING_TX_SOFTWARE)

hardware-receive (SOF_TIMESTAMPING_RX_HARDWARE)

software-receive (SOF_TIMESTAMPING_RX_SOFTWARE)

software-system-clock (SOF_TIMESTAMPING_SOFTWARE)

hardware-raw-clock (SOF_TIMESTAMPING_RAW_HARDWARE)

PTP Hardware Clock: 0

Hardware Transmit Timestamp Modes:

off (HWTSTAMP_TX_OFF)

on (HWTSTAMP_TX_ON)

Hardware Receive Filter Modes:

none (HWTSTAMP_FILTER_NONE)

all (HWTSTAMP_FILTER_ALL)

ptpv1-l4-event (HWTSTAMP_FILTER_PTP_V1_L4_EVENT)

ptpv1-l4-sync (HWTSTAMP_FILTER_PTP_V1_L4_SYNC)

ptpv1-l4-delay-req (HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ)

ptpv2-l4-event (HWTSTAMP_FILTER_PTP_V2_L4_EVENT)

ptpv2-l4-sync (HWTSTAMP_FILTER_PTP_V2_L4_SYNC)

ptpv2-l4-delay-req (HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ)

ptpv2-event (HWTSTAMP_FILTER_PTP_V2_EVENT)

ptpv2-sync (HWTSTAMP_FILTER_PTP_V2_SYNC)

ptpv2-delay-req (HWTSTAMP_FILTER_PTP_V2_DELAY_REQ)

***@arria10:/#







Thank you,



John
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