[Linuxptp-users] Want to reduce offset (which is distance dependant) between boundary clocks.

[aniket]

Hi...very good afternoon to all.

Myself Aniket Hendre, project engineer C from National Centre for Radio
Astrophysics, India.

I am synchronising two boundary clocks using ptp4l. I found that the
offset at the slave PHY clock from master PHY clock varies with respect
to distance between these clocks.

In my first experiment, master and slave are 2 Km away from each other.
In this case I got offset at slave PHY clock around 50 nano second.

In second experiment I relocate my slave around 20 Km from master where
I got offset of 150 nano seconds.
 
Ideally the offset between PHY clocks should remain constant though we
are varying distance between them (correct me if I am wrong).

For both experiments mentioned above I am issuing following common
command 
ptp4l -i eth1 -m. I have connected these two machine using fibre optic
cable with media converter on both ends. My both ethernet ports are
supporting IEEE1588.

Do we need to specify any parameter (which is distance dependant) while
issuing above command? Because there are many PROGRAM AND CLOCK OPTIONS
in ptp4l. Do we need to set any specific option?

Please help.

Thanks in advance
Aniket Hendre

[Richard Cochran]

Post by aniket
In my first experiment, master and slave are 2 Km away from each other.
In this case I got offset at slave PHY clock around 50 nano second.
In second experiment I relocate my slave around 20 Km from master where
I got offset of 150 nano seconds.

So you are checking against GPS, right?

Post by aniket
Ideally the offset between PHY clocks should remain constant though we
are varying distance between them (correct me if I am wrong).

If the system is properly calibrated, then the offset should be
minimal, and the difference in distance should be reflected in the
path delay.

Post by aniket
Do we need to specify any parameter (which is distance dependant) while
issuing above command? Because there are many PROGRAM AND CLOCK OPTIONS
in ptp4l. Do we need to set any specific option?

We do have options to calibrate the system:

delayAsymmetry - corrects for any asymmetry between the Rx and Tx paths
egressLatency - corrects the transmit latency at the MAC/PHY
ingressLatency - corrects the receive latency at the MAC/PHY

What you observe sounds like an asymmetry. If it is, then it is
surprising to me that the asymmetry grows with distance. Then again,
I don't know anything about your equipment, and so maybe this is
simply a property of your fibre optic links.

HTH,
Richard

[Richard Cochran]

Richard I have a server class machine (Dell R720) which is locked to my
GPS10RBN frequency and time standards unit using Network Time Protocol
(NTP). Simultaneously I have 1PPS out from GPS10RBN which I have connected
to my server class machine. NTP daemon has been configured on server class
machine to use this 1PPS by adding following line in /etc/ntp.conf.
server 127.127.22.0 minpoll 4 maxpoll 4
fudge 127.127.22.0 refid PPS flag3 1 flag4 1 time1 -0.060

Do you have a GPS at the master and at the slaves nodes, or only at
the master?

So I do believe that my Dell R720 is now behaving like a PTP grandmaster.
(correct me if I am wrong).

Well, NTP will correct the Linux system time, but not the time in your
PHC device.

What MAC/PHY hardware are you using?

How have you configured ptp4l and phc2sys on each node?

I am now trying to first synchronise two PHY clock by running ptp4l, where
I have observed offset changes w.r.t distance.

What do you mean by "observed offset changes"? Do you mean perhaps
the observed jitter?

ptp4l will always reduce the observed offset to zero, even in the
presence of asymmetry.


Thanks,
Richard

[Richard Cochran]

*phc2sys -s CLOCK_REALTIME -c eth1 -m -O -35 *

FYI, you should be aware that this method reads time stamps over the
PCIe interface. Because of the delay and uncertainty in reading
single values over PCIe, this introduces a time error on the order of
microseconds.

You can avoid this error by directly feeding the 1-PPS into PTP card
that supports external time stamps (like the Intel i210). Then you
can write a little servo to discipline the PTP card to the GPS clock.

I mean to say that I am observing offset at slave side and noticed that the
offset from master is large for large distance between master and slave.

Not sure what you mean. Can you post the client side ptp4l logs for
both cases?

Thanks,
Richard

[Richard Cochran]

So you want to say that instead of steer phy clock of master to synchronize
with its system clock, it is better to steer phy clock by using direct PPS
feeding through intel i210 card. So I don't need to feed PPS to my master
machine through serial port (correct me if i am wrong).

Yes, that is the idea. The i210 has two input pins at CMOS level, and
the most recent Linux kernels support time stamps of external signals
in the i210 driver.

(It does not solve your 2/20 km problem, though.)

Thanks,
Richard

[Miroslav Lichvar]

Post by Richard Cochran
Yes, that is the idea. The i210 has two input pins at CMOS level, and
the most recent Linux kernels support time stamps of external signals
in the i210 driver.

I would like to try this. I don't have an i210 card nearby, but I
assume it requires some soldering. Do you have any pictures that show
where the connection should go and how big is the pad?

[Richard Cochran]

Post by Miroslav Lichvar
I would like to try this. I don't have an i210 card nearby, but I
assume it requires some soldering. Do you have any pictures that show
where the connection should go and how big is the pad?

The card has a 6 pin header, so no soldering is required. I couldn't
find any documentation, and so I ohm'ed the pins out to the chip.
I'll post a photo and my notes.

Thanks,
Richard

[Keller, Jacob E]

These should be documented in the data sheet. But I believe what's in
the kernel is correct.

Regards,
Jake

Post by Miroslav Lichvar
I would like to try this. I don't have an i210 card nearby, but I
assume it requires some soldering. Do you have any pictures that show
where the connection should go and how big is the pad?

The card has a 6 pin header, so no soldering is required.  I couldn't
find any documentation, and so I ohm'ed the pins out to the chip.
I'll post a photo and my notes.
Thanks,
Richard
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[Richard Cochran]

Post by Richard Cochran

Post by Miroslav Lichvar
I would like to try this. I don't have an i210 card nearby, but I
assume it requires some soldering. Do you have any pictures that show
where the connection should go and how big is the pad?

The card has a 6 pin header, so no soldering is required. I couldn't
find any documentation, and so I ohm'ed the pins out to the chip.
I'll post a photo and my notes.

Rich Schmidt sent me this photo he had already made.

Loading Image...

The "Software Defined Pins" (SDP) are on the right side of the 6 pin
header. On the left side you have one 3.3V pin and two ground pins.

The signal level is CMOS, and there is no ESD protection at all.
Be careful!

The SDPs can be programmed as inputs (time stamps on signal edges) or
as outputs (periodic signals). You can do some interesting things
with them. I once made a BC with 3 cards on one mother board, letting
the "lead" card send a 1 PPS to the other two, using the external time
stamps to lock to the lead card.

HTH,
Richard

[Miroslav Lichvar]

Post by Richard Cochran
Rich Schmidt sent me this photo he had already made.
http://linuxptp.sourceforge.net/i210/i210-SDPs.jpg
The "Software Defined Pins" (SDP) are on the right side of the 6 pin
header. On the left side you have one 3.3V pin and two ground pins.
The signal level is CMOS, and there is no ESD protection at all.
Be careful!

Great, thanks for the information. I'll see if I can get an i210 and
connect a GPS PPS signal to it. The PPS is at the TTL level so I guess
I just need a voltage divider.

[Xavier Bestel]

Hi Aniket,

Post by aniket
Hi...very good afternoon to all.
Myself Aniket Hendre, project engineer C from National Centre for Radio 
Astrophysics, India.
I am synchronising two boundary clocks using ptp4l. I found that the 
offset at the slave PHY clock from master PHY clock varies with respect 
to distance between these clocks.
In my first experiment,  master and slave are 2 Km away from each other. 
In this case I got offset at slave PHY clock around 50 nano second.

Over such a distance you may be interested in https://en.wikipedia.org/wiki/The_White_Rabbit_Project

Regards,
Xav